1. Field of the Invention
The present invention relates to a chip scale package chip socket, and in particular a chip socket for two different chip scale package types that have solder balls in the same position.
2. Description of the Related Art
The electronics industry has been progressing with the miniaturization of electronic devices. This trend influences semiconductor packaging technology, which enables the connection between bare IC chips and other components, and enables the connection between bare IC chips and other components. Typically, a semiconductor package has a footprint much larger than that of the chip. To adapt to the miniaturization trend, the size difference between the package and the chip has been reduced, producing a new package type called a Chip scale package (CSP). The solder balls of chip scale package are smaller than ball grid array (BGA) that had arranged according to international standard of Joint Electron Device Engineering Council (JEDEC). When it comes to personal and portable electronic devices, smaller is better, and various products need different chip scale package types and, accordingly, different chip scale package chip sockets. Different chip scale package types need different burn-in board and Hi-Fix and tester change kits that elevate costs.
FIG. 1a and FIG. 1b show schematic diagrams of a conventional chip socket for a first chip socket scale package type 70. The first chip scale package type 70 is square. FIG. 1a shows a schematic diagram of a conventional chip scale package chip socket with the frame switch in first position. FIG. 1b shows a schematic diagram of the conventional chip scale package chip socket with the frame switch in open position. In FIG. 1a and FIG. 1b, the first chip scale package type 70 is on the top of conventional chip scale package chip socket. The first chip scale package type 70 is square. Both sides of the chip have a clamp 72A72B. The chip has a plurality of solder balls 76 arranged according to international standard of Joint Electron Device Engineering Council (JEDEC).
FIG. 2a and FIG. 2b show a conventional chip socket for the second chip scale package type 80 wherein the second chip scale package type 80 is rectangular. FIG. 2a shows a schematic diagram of a conventional chip socket for second chip scale package type 80 with the frame switch in first position. FIG. 2b shows a schematic diagram of a conventional chip scale package chip socket with the frame switch in open position. Both sides of the chip have a clamp 82A82B. The chip has a plurality of solder balls 86 arrayed according to international standard of Joint Electron Device Engineering Council (JEDEC).
In FIG. 1a, a chip scale package chip socket comprising a body 10 has a bay 20 for seating first Chip scale package type 70. Electrical connection probes 12 are formed from outside to the bay 20 to electrically connect the chip 70. Two tong members 14A14B are formed in the body 10 closing to fix a chip in the bay and opening to release the chip. A frame switch 16 is formed on the body 10 moving between a first position and a second position, to move tong members 14A14B between closed and open position, respectively (see FIGS. 1a and 1b) On the top of the conventional chip scale package chip socket is a first chip scale package type 70, which is square. Both sides of the chip have a clamp 72A72B. The chip has a plurality of solder balls 76 arrayed according to the international standard of Joint Electron Device Engineering Council (JEDEC).
FIG. 2a shows a schematic diagram of a conventional chip socket for second chip scale package type 80. The chip scale package chip socket comprises at least a body 30 with a bay 40 for seating second chip scale package type 80. Electrical connection probes 32 extend from outside to the bay 40 to electrically connect the chip 80. Two tong members 34A34B are formed in the body 30 moving between a closed position and an opened position, thereby fixing a chip in bay 40 and releasing the chip, respectively. A frame switch 36 is formed on the body 30 moving between first position and second position, thereby moving tong members 34A34B between closed and opened position, respectively (see FIGS. 2a and 2b) The second chip scale package type 80, on top of the conventional chip scale package chip socket, is rectangular. Both sides of the chip have a clamp 82A82B. The chip has a plurality of solder balls 86 arrayed according to international standard of Joint Electron Device Engineering Council (JEDEC).